The present invention relates generally to phase change memory cells, and more specifically, to a wafer bonded access device for multi-layer phase change memory using a lock-and-key alignment method.
In phase change memory devices, a phase change memory cell typically requires an access device with high current density and a large on/off ratio. Three-dimensional (3-D) integration stacks of phase change memory cells provide a solution for the challenge due to temperature budget requirements. Typically the processing temperature may not exceed 400 degrees Celsius otherwise the underlying MOSFET characteristics may be compromised. Most access devices which meet the high current density and large on/off ratio requirements require processing temperatures which exceed the 400 degrees Celsius processing temperature. In addition, forming a single-crystalline Si access device on top of a non-single crystalline Si substrate is extremely difficult, if not impossible, while keeping the temperature budget below 400 C. A multiplicity of polycrystalline Si access devices will result in a large variability in the access device performances due to the random nature of the crystallites within the polycrystalline Si material.